Although there has been considerable activity in printed circuit board technology, high density printed circuitry is a relatively recent area of investigation. Only recently have materials and processes been developed which can be used to provide the demanding electrical mechanical properties required by high density configurations. High density packaging configurations are required in order to furnish fast access to large amounts of data in the next generation of computers, such as in supercomputers. Conventional packaging techniques will not meet the requirements of high speed signal processing systems. These sophisticated systems, with millions of circuit devices operate at cycle times in the range of one nanosecond or faster. At such speeds, present day packaging techniques will not suffice. Gains in processing speeds achieved at the integrated circuit level are lost when signals transfer between packaging levels and are required to travel long distances. Conventional packages will not permit signal propagation between chip and package without severe loss, distortion, cross-talk, and/or delay.
New packaging approaches, with the ways to package integrated circuits more efficiently, are required to meet this need.
A further challenge posed by the tremendous increase in circuit density on the chip is the power requirements of the package. Better packaging is achieved by increasing the package density, by reducing the thickness of the package including the power and reference planes. However, to meet power requirements, a greater amount of conductor is required. This dichotomy is resolved by creating a separate power board that is then attached to the signal board/chip carrier. When the chip carrier is a ceramic or glass/ceramic MCM, the attachment can be facilitated by a combination of braised pins on the MCM and harcorn springs in the board. However, surface mounted pins that can withstand the stresses of insertion are not possible when both the chip carrier and board substrate are made from an organic polymeric material. Accordingly, an objective of the present invention is to provide an attachment process for connecting two or more organic polymeric substrates.
In circuit boards which do not have the stringent dimensional requirements of high density circuit boards, alignment of through holes from layer to layer is made indirectly, by aligning mechanical location slots which are peripheral to the function of the device and are placed over locating pins in order to align multiple layers. However, in high density circuit boards, the denser circuitry, finer conductor line and track width, thinner dielectric layers, greater number of layers and denser placement of smaller diameter holes and vias require an absolute, dead-on alignment from layer to layer that is not attainable through means that were satisfactory in the past. In the high density circuitry of the future, through-hole tolerance is such that a small misalignment can mean that there is no electrical interconnection at all, or a high resistance interconnection, between the layers where low resistance is required. The alignment of wire cores to each other is thus seen to be a very demanding registration operation requiring optical registration at the key registration step, viz. drilling, exposing circuitry, laminating layers together. This alignment is currently verified by means of attachment coupled with x-ray examination.
The present invention reduces the need for x-ray verification of alignment since alignment can be verified electrically on a subcomposite level.
It is an object of the invention to produce a high density circuit board device exhibiting interlayer alignment and electrical communication.